Download PDF by Philip Garrou, Christopher Bower, Peter Ramm: Handbook of 3D Integration: Volumes 1 and 2 - Technology and

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By Philip Garrou, Christopher Bower, Peter Ramm

ISBN-10: 3527332650

ISBN-13: 9783527332656

ISBN-10: 3527623051

ISBN-13: 9783527623051

The 1st encompassing treatise of this new and extremely vital box places the recognized actual obstacles for traditional second microelectronics
into viewpoint with the necessities for extra microelectronics advancements and marketplace must haves. This two-volume handbook
provides 3D suggestions to the function density challenge, addressing all very important concerns, similar to wafer processing, die bonding, packaging
know-how, and thermal facets. It starts with an introductory half, which defines precious ambitions, present concerns and relates 3D integration
to the semiconductor roadmap of the undefined. sooner than happening to hide processing expertise and 3D constitution fabrication options in
element. this is often through fields of program and a glance on the way forward for 3D integration.

The editors have assembled contributions from key educational and commercial avid gamers within the box, together with Intel, Micron, IBM, Infineon,
Qimonda, NXP, Philips, Toshiba, Semitool, EVG, Tezzaron, Lincoln Labs, Fraunhofer, RPI, IMEC, CEA-LETI and so forth

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Extra resources for Handbook of 3D Integration: Volumes 1 and 2 - Technology and Applications of 3D Integrated Circuits

Example text

2010) More than Moore. (2008) Chapter 2: Drivers for 3D White paper, ITRS. net/Links/2010ITRS/IRC-ITRSvol. 1 (eds P. Garrou, C. Bower, and P. pdf (accessed December 31, Ramm), Wiley-VCH Verlag GmbH, 2013). 9 Ma, M. (2013) The expanding role of OSATs Weinheim. S. (2013) Orthogonal scaling to fill in the era of system integration. ConFab today’s fabs in the future. ConFab Conference, Las Vegas, NV. 10 Solid State Technology (2012) Interposer Conference, Las Vegas, NV. Jones, H. (2010) Cost of participation in supply/ecosystem examined at IMAPS semiconductor industry increasing: impact device packaging.

Power applications: With 3D integration, the wire bonding can be replaced with “ground” TSVs, preventing arcing effects by placing all the electrical connections on the backside of the device, reducing packaging size, and increasing reliability. - Integrated SiPs operating at high power often incorporate high-power vertical components such as IGBT and MOSFETs. - Power “GaN on sapphire” and “GaN on silicon” components benefit from TSV packages in terms of performance because wire bonding is not able to provide the performance requirements for the interconnects.

Early TSMC customers reportedly included Xilinx, AMD, Nvidia, Qualcomm, Texas Instruments, Marvell, and Altera [12], with Xilinx being the first to production in late 2011. 5D TSMC demonstrator vehicle [11]. 5 Memory Reportedly due to “. . 5 and 3D IC, TSMC has taken the position of being responsible for the full process (chip design and fabrication through module test). 2 UMC UMC announced in the spring of 2011 that it had acquired production equipment for TSV and other 3D IC technologies. In 2013 UMC and STATS ChipPAC announced a jointly developed TSV-enabled 3D IC chip stack consisting of a Wide I/O memory test chip stacked upon a TSV-embedded 28 nm processor test chip [13].

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Handbook of 3D Integration: Volumes 1 and 2 - Technology and Applications of 3D Integrated Circuits by Philip Garrou, Christopher Bower, Peter Ramm


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